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 PD - 94163
HEXFET(R) POWER MOSFET SURFACE MOUNT (SMD-1)
IRF5N4905 55V, P-CHANNEL
Product Summary
Part Number
IRF5N4905 BVDSS
-55V
RDS(on) 0.024
ID -55A*
Fifth Generation HEXFET(R) power MOSFETs from International Rectifier utilize advanced processing techniques to achieve the lowest possible on-resistance per silicon unit area. This benefit, combined with the fast switching speed and ruggedized device design that HEXFET power MOSFETs are well known for, provides the designer with an extremely efficient device for use in a wide variety of applications. These devices are well-suited for applications such as switching power supplies, motor controls, inverters, choppers, audio amplifiers and high-energy pulse circuits.
SMD-1
Features:
n n n n n n n n
Low RDS(on) Avalanche Energy Ratings Dynamic dv/dt Rating Simple Drive Requirements Ease of Paralleling Hermetically Sealed Surface Mount Light Weight
Absolute Maximum Ratings
Parameter
ID @ VGS = -10V, TC = 25C ID @ VGS = -10V, TC = 100C IDM PD @ TC = 25C VGS EAS IAR EAR dv/dt TJ T STG Continuous Drain Current Continuous Drain Current Pulsed Drain Current Max. Power Dissipation Linear Derating Factor Gate-to-Source Voltage Single Pulse Avalanche Energy Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt Operating Junction Storage Temperature Range Package Mounting Surface Temperature Weight * Current is limited by package For footnotes refer to the last page -55* -36 -220 125 1.0 20 330 -36 12.5 4.0 -55 to 150 300 (for 5 s) 2.6 (Typical)
Units A
W
W/C
V mJ A mJ V/ns
o
C
g
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1
04/09/01
IRF5N4905
Electrical Characteristics @ Tj = 25C (Unless Otherwise Specified)
Parameter
BVDSS Drain-to-Source Breakdown Voltage BV DSS/T J Temperature Coefficient of Breakdown Voltage RDS(on) Static Drain-to-Source On-State Resistance VGS(th) Gate Threshold Voltage gfs Forward Transconductance IDSS Zero Gate Voltage Drain Current
Min
-55 -- -- -2.0 19 -- -- -- -- -- -- -- -- -- -- -- --
Typ Max Units
-- -0.051 -- -- -- -- -- -- -- -- -- -- -- -- -- -- 5.9 -- -- 0.024 -4.0 -- -25 -250 -100 100 195 45 75 35 165 95 130 -- V V/C V S( ) A
Test Conditions
VGS = 0V, ID = -250A Reference to 25C, ID = -1.0mA VGS = 10V, ID = -36A VDS = VGS, ID = -250A VDS -25V, IDS = -36A VDS = -55V ,VGS=0V VDS = -44V, VGS = 0V, TJ =125C VGS = -20V VGS = 20V VGS =-10V, ID = -36A VDS = -44V VDD = -28V, ID = -36A, VGS =-10V, RG = 2.5
IGSS IGSS Qg Q gs Q gd td(on) tr td(off) tf LS + LD
Gate-to-Source Leakage Forward Gate-to-Source Leakage Reverse Total Gate Charge Gate-to-Source Charge Gate-to-Drain (`Miller') Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Total Inductance
nA nC
ns
nH
Measured from the center of drain pad to center of source pad VGS = 0V, VDS = -25V f = 1.0MHz
Ciss C oss C rss
Input Capacitance Output Capacitance Reverse Transfer Capacitance
-- -- --
3633 1312 505
-- -- --
pF
Source-Drain Diode Ratings and Characteristics
Parameter
IS ISM VSD t rr QRR ton Continuous Source Current (Body Diode) Pulse Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Forward Turn-On Time
Min Typ Max Units
-- -- -- -- -- -- -- -- -- -- -55* -220 -1.6 120 365
Test Conditions
A
V ns nC Tj = 25C, IS = -36A, VGS = 0V Tj = 25C, IF = -36A, di/dt 100A/s VDD -25V
Intrinsic turn-on time is negligible. Turn-on speed is substantially controlled by LS + LD.
* Current is limited by package
Thermal Resistance
Parameter
RthJC Junction-to-Case
Min Typ Max Units
-- -- 1.0
C/W
Test Conditions
Note: Corresponding Spice and Saber models are available on the G&S Website. For footnotes refer to the last page
2
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IRF5N4905
1000
100
-I D , Drain-to-Source Current (A)
-I D , Drain-to-Source Current (A)
VGS -15V -10V -8.0V -7.0V -6.0V -5.5V -5.0V BOTTOM -4.5V TOP
1000
100
VGS -15V -10V -8.0V -7.0V -6.0V -5.5V -5.0V BOTTOM -4.5V TOP
10
-4.5V
10
-4.5V
1 0.1
20s PULSE WIDTH T = 25 C
J 1 10 100
1 0.1
20s PULSE WIDTH T = 150 C
J 1 10 100
-VDS , Drain-to-Source Voltage (V)
-VDS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
1000
2.0
-I D , Drain-to-Source Current (A)
TJ = 25 C TJ = 150 C
R DS(on) , Drain-to-Source On Resistance (Normalized)
ID = -55A
100
1.5
10
1.0
1
0.5
0.1 4 5 6 7 8
15
V DS = -25V 20s PULSE WIDTH 9 10 11 12
0.0 -60 -40 -20
VGS = -10V
0 20 40 60 80 100 120 140 160
-VGS , Gate-to-Source Voltage (V)
TJ , Junction Temperature( C)
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance Vs. Temperature
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3
IRF5N4905
7000
6000
-VGS , Gate-to-Source Voltage (V)
VGS = Ciss = Crss = Coss = 0V, f = 1MHz Cgs + Cgd , Cds SHORTED Cgd Cds + Cgd
20
ID = -36A
16
C, Capacitance (pF)
5000
VDS =-44V VDS =-28V VDS =-11V
Ciss
4000
12
3000
C oss
8
2000
1000
C rss
4
0 1 10 100
0 0 40 80
FOR TEST CIRCUIT SEE FIGURE 13
120 160 200
-VDS , Drain-to-Source Voltage (V)
Q G , Total Gate Charge (nC)
Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage
Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage
1000
1000 OPERATION IN THIS AREA LIMITED BY R DS(on)
-ISD , Reverse Drain Current (A)
100
TJ = 150 C
10
TJ = 25 C
1
-I D, Drain-to-Source Current (A)
100
10 Tc = 25C Tj = 150C Single Pulse 1 1 10
1ms 10ms
0.1 0.2
V GS = 0 V
0.6 1.0 1.4 1.8 2.2
100
1000
-VSD ,Source-to-Drain Voltage (V)
-VDS , Drain-toSource Voltage (V)
Fig 7. Typical Source-Drain Diode Forward Voltage
Fig 8. Maximum Safe Operating Area
4
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IRF5N4905
60
LIMITED BY PACKAGE
50
V DS VGS RG
RD
-ID , Drain Current (A)
D.U.T.
+
30
VGS Pulse Width 1 s Duty Factor 0.1 %
20
Fig 10a. Switching Time Test Circuit
10
VGS
td(on) tr t d(off) tf
0 25 50 75 100 125 150
10%
TC , Case Temperature ( C)
90%
Fig 9. Maximum Drain Current Vs. Case Temperature
VDS
Fig 10b. Switching Time Waveforms
10
Thermal Response (Z thJC )
1 D = 0.50 0.20 0.10 0.1 0.05 0.02 0.01
SINGLE PULSE (THERMAL RESPONSE) 0.0001 0.001 0.01
0.01 0.00001
Notes: 1. Duty factor D = t 1 / t 2 2. Peak TJ = P DM x Z thJC + TC 0.1
P DM t1 t2 1
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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-
40
V DD
5
IRF5N4905
700
VDS
EAS , Single Pulse Avalanche Energy (mJ)
L
600
RG
D .U .T
IA S
VD D A D R IV E R
500
ID -16A -23A BOTTOM -36A TOP
VGS -20V
tp
0.0 1
400
300
15V
200
100
Fig 12a. Unclamped Inductive Test Circuit
IAS
0 25 50 75 100 125 150
Starting TJ , Junction Temperature ( C)
Fig 12c. Maximum Avalanche Energy Vs. Drain Current
tp V (BR)DSS
Fig 12b. Unclamped Inductive Waveforms
Current Regulator Same Type as D.U.T.
50K
QG
-12V 12V
.2F .3F
-10V
QGS VG QGD
VGS
-3mA
Charge
IG
ID
Current Sampling Resistors
Fig 13a. Basic Gate Charge Waveform
Fig 13b. Gate Charge Test Circuit
6
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+
D.U.T.
-
VDS
IRF5N4905
Footnotes:
Repetitive Rating; Pulse width limited by
maximum junction temperature. VDD = -25 V, Starting TJ = 25C, L= 0.5mH Peak IAS = -36A, VGS = -10V, RG= 25
ISD -36A, di/dt -237 A/s, Pulse width 300 s; Duty Cycle 2%
VDD -55V, TJ 150C
Case Outline and Dimensions -- SMD-1
PAD ASSIGNMENTS
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information. Data and specifications subject to change without notice. 04/01
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